AVR JTAG compatible with Atmel's AVR Studio is a complete set of the JTAG interface-based on-chip debugging tools, support all AVR 8-bit RISC instruction with a JTAG port microprocessor. JTAG interface is a 4-wire test access port (TAP) controller that comply with the IEEE 1149.1 standard. IEEE standards to provide an effective test of the circuit board connection standard methods (boundary scan). Atmel AVR devices have extended support full programming and on-chip debug function.
AVR JTAG emulator used for chip hardware emulation program single stepping, setting breakpoints, hardware emulation can understand the detailed operation of the chip inside the program. AVR JTAG emulator to simulate the operation of the chip.
The JTAG ICE support: of ATmega16, on ATmega16L ATMega162 ATmega162V, with ATmega165 ATmega165V, ATMega169, ATmega169V, ATMega32, ATMega323, ATmega323L, ATmega32L, ATMega64, ATmega64L, the ATMega128 Applied ATmega128L, AT90CAN128ATMega16, on ATmega16L, ATMega162, ATmega162V, with ATmega165, and ATmega165V, ATMega169 ATmega169V, ATMega32, ATMega323, ATmega323L, ATmega32L, ATMega64, ATmega64L, ATMega128, ATmega128L, AT90CAN128